nRF52805 BLE module developmentTechnical Reference Document (for developers)GX805 / GX805C Series · Nordic Semiconductor nRF52805 WLCSP
| ⚠ Information on anonymization of sensitive information: The company name, person name, contact information, etc. in the original document has been anonymized as [Customer], [Director in Charge A], [CEO B], [Director C], [Person in Charge D], [Outsourced RF Tuning Company], [PCB Manufacturing Company A/B], etc. |
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231127_[Customer]_Module development_(1st meeting/copy)
Monday, November 27, 20236:13 AM**[Director A], [Representative B], ,[Director C]**
Applied Chip
PCB specifications/placement and circuit wiring consideration
Build-up A, B, CCan applicationExisting can specifications
Ref Module type for review or reference
Module Size
Antenna Type
Can be designed as a chip antenna compared to PCB size.
antenna derivative
Antenna matching
After setting standards for the 2nd and 4th floors of the PCB, design the antenna pattern type before build-up production## Build-upSecondary antenna matching
Sample production?
RF stage tuning
**Delivery of development review details**Thursday, November 30, 202310:03 AM
After reviewing IC and module vendors, it appears that a 2-layer design is possible due to the small number of pin outs.
However, there may be cases where a 4-layer design is unavoidable depending on pin placement, addition of parts, etc.
**PCB prices (sample, mass production) will increase.****I/O is placed outside the chip, so it seems like all I/O can be removed.****There is a limit to reducing the number of I/O modules.Module design decisionsShould the 32.768KHz crystal be treated as optional or put into a module?**The development reference target is, in addition to what [Director A] said,It would be good to use the module developed by Raytac as nRF52805 as a standard.
I think the antenna will be designed almost identically.
Reference issue
Previously, the minimum size of Nordic Ref was 1005 parts.However, recently, as ICs have become smaller, they have been replaced by 0603 (changeable capacities), so partsAll are small. So when you create a module you can keep it small.* → This is not a somewhat common part when contracting production.* → RF tuning requires separate purchase of parts.
BOM/part size reference in Nordic reference/based on inch.
Refer to inch è mm
Consider producing DK board
*→ I reviewed the Ratac product because I thought it would be somewhat difficult to respond to customers without DK in the future.The picture below is Raytac’s DK.
Future considerations
**When producing modules, a JIG design that can test modules individually is required.****Rather than soldering the pins of each module rather than functional parts,**It seems important to create a structure that can make electrical contact.
The development process is briefly outlined below.
Competitive external module product analysis, Nordic 52805 Ref design analysis
Raytac module purchase: analysis of design special issues
Circuit design completed
CAD design progress and design confirmation.
Antenna design preliminary review/antenna matching company
PCB production
Antenna matching/ Bare Board Level
Parts supply: Company-level ([Customer]) or purchase
SMT request
Module test**-Function test: Manual wiring for testing by [customer company]./ Work before DK production.-RF output check: After acquiring DTM F/W ([customer company]), output measurement and tuning if necessary.**1. 2nd Type module and DK developed after 11).If you have any questions after viewing, please call me.##Module[Customer] Design review_Reflection of data analysisTuesday, November 28, 20238:12 AMFrom Raytac
**Module development using nRF52085, referring to MDBT42-512KV2, -P512KV2 module type.*Development concept: Combined use of CAN. → nRF52805, nRF52832WLCSP
Therefore, when developing a module with nRF52832WLCSP in the future, if it is designed the same as the above moduleWe plan to make the CAN design the same because we believe there will be no problems with the design.Above module reviewIt is judged that the design should only reflect additional aspects of the review of the existing nRF52805 module.Total height: 1.8Horizontal 8.8Height 13.8****CAN height: 1.0mmDesign applied PCB: 0.8T, 2LayerAntenna side V-cut, no other sewing holes.==>Can PCB be manufactured?circuit designRF test TP with GNT TP52805 WLCLPX-tal 32Mhz : 1612sizeLC part: 0603 sizewithout DCDC and Xtal 32KhzRF placement: Move the IC towards the antenna as much as possible* → IC output terminal: Reflecting Nordic REF reference* → ANT matching: Pi matching circuit → Raytac module’s nRF52805 has a small PCB, so the RF stage output is greatly bent.**Because the PCB size can be applied to the nRF52832WLCSP module*Applied with a design that directs the RF stage output pattern diagonally straight to the antenna.## nrf52805 Ref_NordicTuesday, December 19, 20237:59 AM1.With DCDC
Without DCDC
PCB Design Reference
Check the RF output terminal impedance below
In practice, the S values below are difficult to apply when designing modules.
Caution: IC nrf52805 <==> up to antenna
Matching does not match as shown below. / It appears that the PCB pattern was not matched considering the part size.
Part Size
Reference module_Raytac MDBT42T /Section results
Tuesday, November 28, 202310:44 AMOnline Purchasehttps://www.digikey.com/en/products/filter/rf\-transceiver\-modules\-and\-modems/872?s\=N4IgTCBcDaILIBEBCAVALGALiAugXyA**https://www.raytac.com/product/ins.php?index\_id\=107**
No 32.768K, No DCDC parts
1.CAN : 0.2T, 1.05mm (height from PCB top), 5.8mm x 7.0mm2.PCB: 0.8T 4layer3.X-tal: Use 1612
3.Half Hole
3.Via BPL and PSR
4.Placement and ANT Geometry
Placement concept
Antenna matching stage: Pi configurationMove the IC as close to the antenna as possibleIC output tuning stage adopts nRF52805 REF arrangement design.
Part size
- 7. 1005 Alternative Review
Problem: Tuning becomes easier as the size increases, but tuning issues increase because references are not considered.
240117 : [PCB Manufacturer A]-
The section result is 0.7T, H/H oz, both sides are the same, but there is no 0.7T material, and when working with 0.8T, H/H oz, the final thickness is expected to be 0.9T.
Reference module_Raytac MDBT42
Friday, December 22, 202312:24 PMhttps://www.raytac.com/product/ins.php?index\_id\=33
**Module development using nRF52085, referring to the above MDBT42-512KV2, -P512KV2 module types.*Main purpose: Combined use of CAN. → nRF52805, nRF52832WLCSP
Therefore, when developing a module with nRF52832WLCSP in the future, if it is designed the same as the above module
We plan to make the CAN design the same because we believe there will be no problems with the design.Above module reviewIt is judged that the design should only reflect additional aspects of the review of the existing nRF52805 module.Total height: 1.8Horizontal 8.8Height 13.8CAN height: 1.0mmCANLeft and right edges have a step equal to the thickness
Raytac DK with Half hole module
Tuesday, November 28, 20231:32 PMhttps://www.raytac.com/product/ins.php?index\_id\=114
Raytac DK with SMD module
Tuesday, November 28, 20231:35 PMhttps://www.raytac.com/product/ins.php?index\_id\=130
Tuning Parts KitTuesday, November 28, 20232:21 PMhttps://www.devicemart.co.kr/goods/view?no\=1313419
https://www.devicemart.co.kr/goods/view?no\=1313427
Module test/module testWednesday, November 29, 20239:35 AMhttp://www.jig\-hitech.co.kr/page/product01\_02\.php
https://www.instructables.com/DIY\-ESP8266\-ESP\-12\-Socket\-Snap\-Fit\-Breadboard\-Frie/
https://ko.aliexpress.com/i/32802723152\.html?gatewayAdapt\=glo2kor
https://hackaday.com/2022/03/07/flexypins\-might\-help\-with\-those\-pesky\-castellated\-modules/
https://www.espressif.com/en/products/equipment/production\-testing\-equipment/overview
https://forum.contextualelectronics.com/t/test\-jig\-for\-esp8266\-modules/4637
231214_2nd meeting for module development.
Monday, December 11, 20233:07 PMDevelopment consideration
Development items: 2 types of modules and 2 types of EVB
Development materials: Circuit diagram PDF, Gerber file, PCB DXF file
Direction of jig development, difficulty/outsourcing?
Use of existing cans: module design with reference to existing datasheet
While designing the module (reviewing Ratac’s module), can soldering positions are provided==> CAN production
Module sample purchase
231222**[Representative B]’s phone callModule ConceptThe size of the moduleDesigned based on Raytac’s MDBT42-512KV2 or MDBT42-P512KV2 size/half hole.The above module is designed based on nRF52832 WLCSPFirst, the development module is designed with nRF52805 to match the size of the module aboveWe plan to use the same CAN when developing additional modules by applying nRF52832 WLCP in the future.
Circuit design decisionsModulePCB Size: 8.8 x 13.8PCB T : 0.8TPCB Layer: 2LRF IC:nRF52805With out: 32.768Khz,DCDC inductorAnt: pattern and chip32Mhz: 1612 / shared with nRF52832WLCP module in the future****L, C: nRF52805 Ref from Nordic**
EVB
**CAN Dimension_PPT**Wednesday, December 27, 202311:29 AM
**For CAD_PPT**Wednesday, December 27, 20232:52 PM
Note EVB placement
**240109_3rd meeting of module development.**Tuesday, January 9, 202412:08 PM##J-link Pin outWednesday, January 31, 202411:08 AMhttps://wiki.segger.com/20\-pin\_J\-Link\_Connector****Pinout for JTAG
https://www.devicemart.co.kr/goods/view?no\=1179243
https://ko.aliexpress.com/i/32428874079\.html
CAD Review1Monday, January 29, 20245:29 AMModuleShield can parts equipmentShield can data uploaded, thickness indicatedShield can fixing pad**Non plate application****J8: Move slightly to the left,****Small ==>**R value?Shield can soldering padExposure
Antenna width, length
BOTTOM PAD size1
CAD Review 2
Monday, January 29, 20241:54 PMModule
Bottom pad size is small.
TP3, TP4 added/circuit changed.
*→ Add 1 pie pad to the bottom sideRefer to pages 3 and 4 of For Cad.pdf
SILK1. 1. Module**-Pattern Antenna Bottom Area: GW_MHP52805_V1.0****-Chip Antenna Bottom Area: GW_MHC52805_V1.0MainGW_EVB_MHP52805_V1.0****Please indicate SILK for each green color in the circuit diagram.**## CAD Review3
Tuesday, January 30, 20245:48 AMModuleshield can**J8 is placed on the shield can center line, and the GND copper at the bottom of J8 also matches the J8 line.****The distance between the center point of J8 and the bottom of the shield can is 3.8-0.75=3.05, but it is somewhat short at about 2.949.****Shield can solder pad exposed.*Placement / I should have told you in advance… I’m sorry. → I think we need to minimize the RF section to eliminate loss.
Even if it’s not necessarily straight as shown below, I think I’ll have to make some modifications.
I think I need to move the U2 arrangement as high as possible and modify the wiring connecting the RF stage and pads 5 and 6.
* → Secure GND space by reducing the pattern length connected to 5 and 6 pads as much as possible
wiring
*Pattern connection at the top without 11pin via**Move upward via via connected to 15 pin, move C10 position.antennaPlace the antenna as close to the outer edge of the PCB as possible on the top, bottom, and right sides. → Antenna and GND distance → The starting point also moves upward. → Reflecting the horizontal length of the x-axis, only the length from the starting point to the right increases.
- → The increased length on both sides of the Y axis (up and down) is equally distributed only to the vertical length of the 3-stage wave.
Pin spacing
0.9mm/full application* → Standard 9pin---->2pin / 1pin fixed* → 10pin~16pin: 0.9mm interval based on the left center
- → 17pin~19pin: Line alignment with the upper 9pin and 0.9mm interval / 19pin fixed
pad size
Pad at Bottom: 0.4 x0.8****However, 1pin: length only 1.2mm, 19pin: maintainedPAD GND connection and copper reinforcementTop: 10,16: copper reinforcement****Bottom pins 10, 16, 1, and 19 are also connected to GND and reinforced with copperU2 GND viaApply Via in the center / Refer to 52805 Data City
Nordic datasheet
U2 pin spacing
Space between G1~G2 does not match.
Main
Remove Conn area
SILK1. 1. Module**-Pattern Antenna Bottom Area: GW_MHP52805_V1.0****-Chip Antenna Bottom Area: GW_MHC52805_V1.01. 2. MainGW_EVB_MHP52805_V1.0****Please indicate SILK for each green color in the circuit diagram.**## CAD Review4
Wednesday, January 31, 20248:01 AMModule19pin top, bottom pad expansion ==> to CAN hole* → CAN is also GND, so there is no short circuit problem.
Y1 90 degree clockwise rotation
Keep the wiring short
TP3, TP4 silk position overlap?
Cut it according to the wave line at the end of the antenna.
EVBI think the module soldering pad is not in the right position? I think it should match or be a little bigger.Module pads appear to touch EVB GND Copper.CONN1A5,B5 pad size adjustment## CAD Review5
Wednesday, January 31, 202410:36 AMModule
Reason for Y1 GND separation?
Distance between J8 center and the bottom of the shield 2.949mm ==>3.05mm
Copper reinforcement including vias
Main
2~9 Add a little more space between the left and right copper of the pad.
18, 17 Please leave a little more space between the left and right pads.
J9 pin number silk
Please write only 4 numbers: 1, 2, 9, and 10.
Please also include All GPIO at the bottom.J7 UchiPlease lower it to about line c17.
Please put them in the J5 and J2 square boxes. And please add J-Link.
CAD Review6Thursday, February 1, 20247:19 AMModule****EVBThe length from the pad soldered to the module to the inside of the line is 1.4mm.**To maintain this length, the GND space of the module must be narrowed further****It would be better not to do that.**Just make it equal to 1.2mm like the pad length of the module. Leave the GND copper alone.
Pad size is not a problem for soldering anyway.
It looks like it came in a J-Link Silk box… It doesn’t look white?
J7 location is good.
Please put Current text at the bottom of J7.
Turn TP1 and TP2 90 degrees counterclockwise.
This is a pad that is used by soldering, so I think it would be better to place it horizontally.
Please change C21 ==> to NC/1005 in the circuit diagram.
CAD Review7Monday, February 5, 20247:18 AMAlign L7 to C7 line.
Shield can top left: The horizontal direction from the corner must be soldered****There is no soldering area in the vertical direction
Check mask
**CAD Review 7 Final_[Client] Share**Friday, February 2, 20242:25 PM
**Pattern antenna matching/additional review of shape**Thursday, February 15, 202412:38 PM
As it is a circuit for both pattern and chip antennas, about pattern antenna E1
Matching is required with L3, C7, L4 (0603size).## However, we request antenna matching while the Module PCB is soldered to the Main BD.
Review Matters**\Has [Customer] ever tested the RF range among the RF characteristics of the Raytac module?****==============================**## First pattern antenna matching request
1.Issue: Gain is currently too small.The gap between the antenna wave part and PCB GND is narrow, so the characteristics deteriorate due to the C valueMeasurement after 1st matching
Measurement after 2nd matching
Compare Raytac modules/same size
**Raytac module characteristics/datasheet****Peak gain is low and there is no significant difference (chamber error) from the characteristics of the [client] module.**In addition, the gain characteristics appear to have been copied directly from Peak EIRP data.
Gain must be a 360-degree interval average, so it must show a much lower measurement value than Peak.
======================================Antenna ConsiderationsDesign Board
Raytac Board
Performance improvement plan/Gain
GND separation, antenna width reduction
Review 1) Below is similar to the USB dongle design data / secondary measurement of the module.
Review 2)The antenna shape does not take a wave even if the length is short as shown belowConsideration on antenna shape: phone call_240226
**Chip antenna matching**Thursday, February 15, 202412:47 PM
It is a circuit for both pattern and chip antennas, and the PCB is manufactured individually with only the antennas different.
Matching to L3, C7, L4, L7 (0603 size) is required for chip antenna E2.## It would be better to do antenna matching while the Module PCB is soldered to the Main BD.
**PCB 1st shipment**Monday, February 19, 202410:51 AM
Module land formation problem
CAN seated status
PCB 2nd arrival_module
Thursday, February 29, 20247:16 AM**Reference when making Half Hole.[PCB Manufacturer B] Based on Half Hole specificationsHalf hole drill: 0.4Half hole pad: 0.6Half hole drill: regulation is 0.8, minimum value: 0.4 / routing drill is 1.0If you use a smaller half hole, the hole will collapse.Half Hole Pad: In the panel plating method to preserve the plating of the half holeConsidering the characteristics of dry film, the hole is 0.1mm or more on the left and rightPAD must be inserted.****Depending on the nickname method, correction is required during the process when creating a half hole.**nickname
- 1)Panel plating: Use of dry film / Currently common method
- 2)Pattern plating: Use of lead / Old method, seems to have been used by Raytac module.
**Exactly how it was manufactured because the HPL process was applied****Difficult to understand.**Metal Gerber No. 1
**Metal Gerber No. 2Half hole drill: 0.4 / Minimum value reflected in production processPAD design: 0.4,*PAD correction: Minimum value is 0.6 based on 0.45 / 0.4 drill → Plating disappears when nicknamed.
Metal Gerber No. 3
Comparison of PAD size between Metal Gerber No. 1 (Half Hole not plated) and reference product
Comparison of Metal Gerber No. 2 (minimum specifications: 0.4 drill, modified in CAM with 0.6pad) and reference product’s PAD and spacing
3rd arrival of PCB_moduleFriday, March 8, 20245:10 AMHalf Hole Formation/Plating StatusHalf Hole: Correction with 0.6pad, 0.3 dril/ Original: 0.4pad, 0.3 dril
Half hole formation/prevention of burrs rather than removal
First drill on the left side of the Half Hole before routing.
**RF tuning result**Monday, March 18, 20248:51 AM
**Inspection of overall contents after 1st development SMD**Friday, March 8, 20245:20 AM
RF
Reference to results before and after tuning and comparison of antenna matching results/raytac characteristics_Chip, pattern, RaytacCheck distance when communicating between modulesCheck distance when communicating between module and mobile phone##Refer to the last performance improvement plan in the additional review of antenna characteristic improvement/pattern antenna matching summaryPCB productionHalf Hole Design* → Process and design modificationsChange in CAD design of pad size and drill dimensions according to half hole formation rules, prevent burrs,
Review for improvement / apply to secondary sample or final data
- 1) Half Hole: Pad and drill dimension modification 0.4/0.3==>0.6/0.4 (PCB process)
GND reinforcement: Whether to add GND half hole on the side, when changing, add GND as well as EVB1. 2) EVBPin header interference when storing U4* → Whether to change J6, J4, J1 to 1608 0ohm* → J9, J10 move to the right
- 3) Module ANT characteristics / additional design review
Comparison of current antenna characteristic results of 3 types_pattern, chip, Raytac
- 4)) During shield can CAN reel packing, the parts are not seated uniformly due to the large gap in the reel pocket (SMT process)
Module Kit Array Placement
- 1) Has anything been discussed with the JIG manufacturer?
Total number of modules, array placement required in JIG, etc.
Request for CAD modification after 1st development SMTFriday, March 22, 202411:09 AMEdit2 types of modules and EVB****Module circuit removed from EVBEdit contents**-Concerns of interference with shield cans: C10, L2, C7*** → With the shield can fixed, move the entire part downward by 0.2mm.
→ The antenna is fixed without moving. Side Half Hole: Basic rules applied due to various reasons in PCB processing. → Drill: 0.4mm, PAD size: 0.6mm, → The same applies to 1 and 19 pins.
motherboard
→ Modified to fit the module pad. → R16, R17 pull-ups added
Pin header interference when storing U4* → Change J6, J4, J1 to 1608 0ohm/add R18, R19, R20* → J9, J10 move to the right
Half Hole Reference Image
The 4 images below show a normal Half Hole,
When correction values are reflected during CAM work on existing CAD design dataThis is an image of**, and a via is formed normally. The value is 0.4/0.6.**
The four images below are images of half hole defective products
It is said that when manufactured according to the existing data, the Via Hole was not formed during etching.
Therefore, the reason for CAD correction is when the correction value is applied so that the PCB is produced without problemsBecause the PAD on the half hole side is made in an unusual shape, it not only looks badBecause other issues may arise when providing the product, the PAD size is fundamentally uniform
To.
**Module design H/W differentiationThursday, February 15, 202412:57 PM1. Via is applied to the side half hole PAD to strengthen the connection with the main B/D.**Connectivity is secured by Pad on Via even if the half hole side is damaged for other reasons.
HPL applied to all vias
**Because there is no GAS generated from the via, the RF IC and surrounding components are not affected by GAS****Prevents cold soldering.**Also, when soldering closely to the main B/D, interference with surrounding patterns is blocked.
Less affected by surrounding noise through separation of copper around X-Tal.
Module production jig relatedMonday, April 29, 202410:29 AMModule jig inquiry/visit1.Test block material/RF test related2.Mainboard and pin connection method (dual, single)/Advantages and disadvantages****3.Pin spacing 0.9mm
- → Minimum spacing??/During future design
Circuit manufacturing review
-Jig sample confirmation, jig design review according to module test scenario.-Whether the motherboard is installed in the test block case/whether a separate external case is applied-Power supply connection configuration
-Program pin connection configuration
F/W programming
-Module test FW, Module product FW programming* → Configure test and sales firmware into oneShould I just program it once? .??
Test scenario
- 1) RF frequency
- 2) RF output level
- 3) I/O test
Short, open
======================H/W design review not includedPhysical connection test
I/O test 1
Short circuit between IC and Pad to I/O,
All I/Os are in Pull-up state (external Pull-up)After setting Out mode and Low output for specific I/O using softwareCheck High status with the remaining I/O set to Input mode**(Check GND short, check open connection)Is there any I/O with low input?(Check short circuit between I/O)Repeatedly check all I/Os sequentially.Random I/O enters test mode and moves to the next test itemUse one random I/O to display results. (LED and buzzer)Except for mode and display LEDs, connect LEDs to the remaining I/O.Check the I/O connection status by visually checking the sequential lighting operation of the LED.****Check RF Signal1. 1. Check GainEnter into Becon mode by pressing the JIG button / or signal confirmation mode in the APP.nRF Tool/phone APPCheck RSS valueFrequency checkSpecific RF ch output by JIG button/constant carrier in DTM mode-Check frequency in range with spectrum analyzer.Sampling test in 100EA units.**## **Module socket design drawingTuesday, June 4, 2024*
4:04 PM
DDDF## **Board design for module production jig**Thursday, May 16, 20248:14 AM
EVB circuit diagram
<<PCA10040_Schematic_And_PCB-nskim.pdf>>
Design composition concept
Inquiry regarding module socket design
PCB Layout where the module is seated
Is the connection between the module and the 18EA pad in the PCB layout a spring pin contact rather than soldering?
What material is the socket made of?
Metal material among the parts touching the PCB?## ==>Area where the socket is in contact with the socket board. Silk applied and insulating paper****Module circuit diagram
Socket GPIO pin configuration****Is the power supply 5V or option processing??: No.Added condenser for powerBoard design using EVB connectors P1,2,3,4,6,Designed so that the PIN of all PADs of the module is configured as a circuit.-P0.01, Should P0.00 be checked through I/O or by connecting to 32.768K X-tal?
- → 32.768K default configuration, optional I/O configuration
-DCC and DEC4 are configured by software depending on the DCDC circuit configuration of the socket board?****-The remaining I/O is connected to EVB’s U1 (nRF52832) AIN0~7. (Red dot I/O above)****Power is the same as VIO=VDD=VDD_nRF and uses 1,2 pins (VIO) and 6,7 (GND) of P1.*Shield detect pin used? → If used, what is the pin handling plan?Is it GND by soldering SB18 of PCA10040?##(When processing on the socket board, connector connectivity with the socket board is not good)**
Programming##Use P20 connector==>Connect with socket board?##Select pin separate circuit configuration: High processing on socket board?* → shield select pin header processing required.P20’s 8 pin is a GND detect pin, but there is no pattern connection on the PCB.* → However, by selecting J-link or EVB using the 8pin GND detector of P20,Insert a pin header that can be programmed.* →**P20 connector will not be used, only J-Link will be used.**Connection may be unstable when using P20.
Power and USB to serial
https://sheep\-thrills.net/FT230X\_SMD\_module.html
=============================== ===============================
First socket board concept
Secondary socket board conceptRefer to the picture below for JIG board designPin header socket is dip type to ensure stability
https://devzone.nordicsemi.com/f/nordic\-q\-a/27786/flashing\-external\-board\-using\-nrfgo\-studio
Refer to J-link
20-pin J-Link Connector****https://wiki.segger.com/20\-pin\_J\-Link\_Connector****Pin configuration based on SWD interface
Module data sheet reviewTuesday, June 4, 20247:12 AMGX805CIt would be nice to change the photo in the future by applying shield cans for mass production.Also, because we decided not to use half holes for the module padIt would be better to apply the photo after SMT to the changed PCB in the future.
GX805 is the model name of the pattern antenna module.
(When confirming the module name, “C” is attached to the chip antenna from the beginning, and there is no attached pattern antenna)As shown below, GX805 is used as a common name, but it is difficult to see it as a common name for 2 modulesUsers may be a bit confused when ordering.
**Module and DK PCB design change**Friday, June 7, 20241:39 PM================================= =================================Review of module design changes /\Share during [client] meetingInquiry regarding the effect on RF characteristics due to half hole removal and silk change.*Answer (antenna design company): Radiation characteristics can vary significantly.The reason is that the module is small, so the soldering amount of PAD is less than GND conditionIt can affect the dielectric constant of the part that is closely attached to the main B’D by silk**There may be a small effect due to differences. → Need to check the characteristics of the tuning stage and antenna matching stage.
We are preparing to manufacture a new PCB and check its characteristics after SMT.
PCB를 제작하기 전에 PCB수정을 통해 GND 조건을 최대한 추가로 보상하는 방법.* → 패드추가 하여 진행 검토. (기존에는 패턴을 일부 배선고려)* → KC인증 전에 수정사항 반영
Main_TOP
Module_BOT
진행
→ SUB, Main 모두 CAD 수정 : 외부업체 → PCB발주 및 부품 : [고객사] → SMT : [고객사] → 튜닝 : [외주RF튜닝업체] *→ 메칭확인 : 외부업체**외부업체 건은 일부비용이 발생됩니다.*CAD수정 : 모듈 2종 EVB 1종 → Module 의 GND Pad는 3 Point 추가.
- → EVB의 PAD는 데이터시트 기반으로 Main Board PAD 형성.
================================================================
[담당자D]공유Module**GND pad 추가**안테나 형상 1종 추가 : 파일명은 “-1” 추가되어서 다르게 구분하지만 Silk는 GX805와 동일함.* → 모듈 총 3종
EVB
GND Pad추가 및 전체 Pad size 조정
실크변경 : GW_EVB_MHP&C52805_V1.1==> GW_EVB_GX805_V1.0공통사항설계명 변경 : 파일명 참고하여 도면에 표시명 변경 부탁드려요..수정관련 참고 내용GND Pad 추가
안테나 형상 추가 관련정해진 길이 없음: 안테나 부품메칭으로 보상, 길이는17mm예상, 폭은 0.3mm,(GND pad추가는 위와 동일하게 적용)
EVB모듈에 추가된 패드와 동일한 위치에 PAD추가PAD size는 아래 그림을 참고하여 size 조정
=======================## CAD 검토
패턴안테나 메칭의뢰/2차
2024년 7월 16일 화요일오전 6:10회로도/ 안테나 2종 동일
모노폴웨이브 안테나
- 2)모노폴안테나
Chip안테나 메칭/2차
2024년 7월 19일 금요일오전 10:31**[고객사]에서 [담당이사A]에게 모듈 PCB 및 EVB 전달하기로 함.**
**240828_미팅**2024년 8월 28일 수요일오후 1:50##1.대만 안테나 메칭 이후 미팅
- 안건 : 1)효율때문에 PAD설계 변경 또는 유지에 관련된 내용.
- 2)회신 주신 칩 안테나(CW804) 로 재설계를 해야 하는지에 대한 내용.
- 3)메칭 검토 10페이지 BOM 반영 관련 내용
- 4)기타 사항
- → Chip 안테나 변경하여 PCB 설계변경.
소켓보드 : 회로에서 USB -c 커넥터 제거Ts##CAD 검토_소켓보드2024년 10월 8일 화요일오전 8:08SW1ON, OFF의 실크 위치를 서로 바꿔서 배치.
(스위치를 오른쪽으로 당기면 1-2간 연결되어 ON되므로 ON 실크를 스위치 오른쪽에 배치)
회로도 수정을 좀 했습니다.
아래 2곳 입니다.
TX를 ==>RX로, RX를 ==>TX로 변경.
* → 변경
R17 GND를 아래와 같이 변경했습니다.
아래 영역에 있는 TP 및 부품을 모두 Bottom에 배치해야 될 것 같습니다.
검토하다 보니 소켓기구가 PCB에 완전 밀착이 되더라구요..
**소켓보드 전류 제한**2025년 1월 17일 금요일오전 8:45##소켓보드를 사용하여 Module을 시험하는 과정에서 모듈이 열이 발생하는 경우
전원을 차단하고자 함.
모듈이 모든시험에서 정상적으로 동작함에도 불구하고 어딘가 쇼트현상에 의해 전류를 과다하게 소모하고 있고, 이때 모듈에서 열이 발생함.
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Fixed current and low price
**Module heat failure analysis**Saturday, March 15, 20256:42 AM